MegaROM Mappers
This page was last modified 09:34, 22 November 2021 by Gdx. Based on work by Mars2000you and Wbahnassi and others.
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Contents

Introduction

A MegaROM is officially a cartridge that includes ROM of at least 128 kB. This memory is addressable through the same MSX slot by dividing the ROM by segments (commonly 8 or 16 kB), in order to switch them on one or several memory pages. Segments are switched by writing generally at dedicaced addresses in the slot where the cartridge is located to access the corresponding registers, but also sometime by using I/O ports. There are other methods to switch the segment but they are almost never used on MSX.

A related term is "ROM mapper". This usually refers to the mechanism used to switch segments, as seen from a programmer's point of view (see below). "MegaROM" usually refers to a cartridge that includes such a mechanism. Note this mechanism can be also used on ROM less than 128kB.

Very few exceptions aside, ROM cartridges have a power-of-2 size. Common MegaROM sizes are 1 Mbit (128 kB) or 2 Mbit (256 kB). But 4 Mbit (512 kB) and even some bigger MegaROMs exist. MegaROMs usually have a "MegaROM" symbol on the cartridge label and/or box.

There exist several different types of ROM mapper. Some common ones are:

  • ASCII 8K
  • ASCII 16K
  • Konami without SCC
  • Konami with SCC

A special type of MegaROM is Konami's Sound Custom Chip (SCC). Besides a ROM mapper it also includes a sound chip. The SCC chip produces a characteristic sound, which is liked very much among MSX users.

A few MegaROM cartridges contain some battery-backed SRAM. This RAM may be used to store save-games for example. Hydlide II is an example of this.

Description of known ROM Mappers

Here is the description of the methods to access the registers of the ROM mappers known.

ASC8 (ASCII)

Rom size can be up to 1024kB (chip LZ93A13) or 2048kB (chip M60002). Several makers use this Rom mapper.

Page (8kB) Switching address Initial segment
4000h~5FFFh (mirror: C000h~DFFFh) 6000h (mirrors: 6001h~67FFh) 0
6000h~7FFFh (mirror: E000h~FFFFh) 6800h (mirrors: 6801h~68FFh) 0
8000h~9FFFh (mirror: 0000h~1FFFh) 7000h (mirrors: 7001h~77FFh) 0
A000h~BFFFh (mirror: 2000h~3FFFh) 7800h (mirrors: 7801h~7FFFh) 0

Note: Pages mirrors are not present on many cartridges.

Value format for MegaROMs with an extra SRAM

Xanadu (SRAM of 8kB):
Bits 0~4 = Segment number (0 when SRAM because there is only one segment)
Bit 5 = 1 to select the SRAM (writable on page 8000h~9FFFh or A000h~BFFFh only)
Bits 6~7 = Unused

Royal Blood & Wizardry (SRAM of 8kB):
Bits 0~6 = Segment number (0 when SRAM because there is only one segment)
Bit 7 = 1 to select the SRAM (writable on page 8000h~9FFFh or A000h~BFFFh only)

ESE-RAM (DIY cartridge called also Mega-SRAM that only contains SRAM):
Bits 0~6 = Segment number (bit 6 avalaible with chip M60002 only)
Bit 7 = Enable writing. (write protected at initialization)

ASC16 (ASCII)

Rom size can be up to 2048kB (chip LZ93A13) or 4096kB (chip M60002). Several makers use this Rom mapper.

Page (16kB) Switching address Initial segment
4000h~7FFFh (mirror: C000h~FFFFh) 6000h (mirrors: 6001h~7FFFh) 0 (0Fh for R-Type)
8000h~BFFFh (mirror: 0000h~7FFFh) 7000h (mirrors: 7001h~BFFFh) 0
Notes: R-Type (384kB) uses same mapper but the segment 0Fh remains fixed on page 4000h~7FFFh. In addition, the segment 0Fh is same as 17h (the last segment).
Pages mirrors are not present on many cartridges.

Value format for MegaROMs with an extra SRAM

Hydlide 2 (SRAM of 2kB):
Bits 0~3 = Segment number (0 when SRAM because there is only one segment)
Bit 4 = 1 to select the SRAM (writable on page 8000h~BFFFh only)
Bits 5~7 = Unused

ESE-RAM (DIY cartridge called also Mega-SRAM that only contains SRAM):
Bits 0~6 = Segment number
Bit 7 = Enable writing. (write protected at initialization)

Black Box, Deluxe Box and Golden Box (Zemina)

These Korean cartridges are Megarams of 128kB to 2048kB RAM. The cartridges have two mappers switchable by writing to I/O port 0Fh.

Mode 8K Mode 16K
Page (8kB) Switching address Initial segment Page (16kB) Switching address Initial segment
4000h~5FFFh 4000h 0 4000h~7FFFh 4000h 0
6000h~7FFFh 4001h 0
8000h~BFFFh 4002h 0 8000h~9FFFh 4001h 0
A000h~BFFFh 4003h 0

Format of value to write to the port 0Fh:
Bit 0~4 = Unused.
Bit 4~5 = 01 to enable witting, 10 to write protect (initial status).
Bit 6~7 = 01 to select 16K mode, 10 to select 8K mode (initial status).

Cross Blaim (db-Soft)

Rom size is only 64kB.

Page (16kB) Switching addresses Initial segment
4000h~7FFFh None Always 0
8000h~BFFFh 4045h 0

Dooly The Little Dinosaur (Daou Infosys) / 아기공룡 둘리 (다우 정보시스템)

Rom size is only 32kB. The Rom uses a mapper very specific not to select memory segments but for anti-piracy protection.

Page Switching address Mode
4000h~BFFFh 4000h (mirrors: 4001h~BFFFh) 0

Description of modes

  • In mode 0, the read value = the value at corresponding address
  • In mode 1, the value = (value at address & F8h) or ((value at address x 4) & 4) or ((value at address / 2) & 3)
  • In mode 4, the value = (value at address & F8h) or ((value at address / 4) & 1) or ((value at address x 2) & 6)
  • In mode 3 and 7, the value = value at address 7
  • In mode 2, 5 and 6,
    if (the value at the address) & 7 = 1, 2 or 4 then the value = F8h
    if (the value at address) & 7 = 3, 5 or 6 then if mode = 2 then the value = (value at address & F8h) or ((value at address x 4) & 4) or (((value at address / 2) & 3) xor 7)
    if the mode = 5 then the value = (value at address & 7)
    if the mode = 6 then the value = (value at address & F8h) or ((value at address / 4) & 1) or (((value at address x 2) & 6) xor 7)

Game Master 2 (Konami)

Rom size is 128kB and SRAM is 8kB (2 segments of 4kB).

Page (8kB) Switching address Initial segment
4000h~5FFFh None Always 0
6000h~7FFFh 6000h (mirrors: 6001h~6FFFh) 1
8000h~9FFFh 8000h (mirrors: 8001h~8FFFh) 2
A000h~BFFFh A000h (mirrors: A001h~AFFFh) 3


Value format
Bit 0~3 = Segment number
Bit 4 = 1 to select the SRAM (writable on page B000h~BFFFh only)
Bit 5 = SRAM segment select (two segments of 4kB available)
Bit 6~7 = Unused

Generic8

Mapper based on a mix of Konami's MegaROMs. It is used by some emulators. If you use blueMSX, you need to select the Konami Generic mapper.

Page (8kB) Switching address Initial segment
4000h~5FFFh 4000h (mirrors: 4001h~47FFh, 05000h~077FFh) 0
6000h~7FFFh 6000h (mirrors: 6001h~67FFh, 07000h~077FFh) 1
8000h~9FFFh 8000h (mirrors: 8001h~87FFh, 09000h~097FFh) 2
A000h~BFFFh A000h (mirrors: A001h~A7FFh, 0B000h~0B7FFh) 3

Generic16

Mapper similar to Generic8 but with segments of 16kB. It is used by some emulators. If you use blueMSX, you need to select the MSX-DOS 2 mapper, as this emulator, contrary to openMSX, does not have a specific mapper for the real Japanese MSX-DOS 2 cartridge with extra RAM.

Page (16kB) Switching address Initial segment
4000h~7FFFh 4000h (mirrors: 4001h~47FFh, 05000h~077FFh,
06000h~067FFh, 07000h~077FFh)
0
8000h~BFFFh 8000h (mirrors: 8001h~87FFh, 09000h~097FFh,
0A000h~0A7FFh, 0B000h~0B7FFh)
1

Harry Fox - The Demonic Snow Beast (Micro Cabin) / は~りぃふぉっくす雪の魔王編 (マイクロキャビン)

Rom size is only 64kB.

Page (16kB) Switching address Initial segment
4000h~7FFFh 6000h (mirrors: 6001h~6FFFh) 0
8000h~BFFFh 7000h (mirrors: 7001h~7FFFh) 1

Holy Quran (Al-Alamiah)

Rom size is 1024kB.

Page (8kB) Switching address Initial segment
4000h~5FFFh 5000h (mirrors: 5001h~53FFh) 0
6000h~7FFFh 5400h (mirrors: 5401h~57FFh) 0
8000h~9FFFh 5800h (mirrors: 5801h~5BFFh) 0
A000h~BFFFh 5C00h (mirrors: 5C01h~5FFFh) 0

Konami's MegaROMs with SCC

Konami's game cartridges with an extra sound chip called SCC.

Page (8kB) Switching address Initial segment
4000h~5FFFh (mirror: C000h~DFFFh) 5000h (mirrors: 5001h~57FFh) 0
6000h~7FFFh (mirror: E000h~FFFFh) 7000h (mirrors: 7001h~77FFh) 1
8000h~9FFFh (mirror: 0000h~1FFFh) 9000h (mirrors: 9001h~97FFh) 2
A000h~BFFFh (mirror: 2000h~3FFFh) B000h (mirrors: B001h~B7FFh) 3


Value format:

Bit 0~5 = Segment number. Set all of these bits at 9000h to enable the addresses to access to the SCC registers.
Bit 6~7 = Unused

Addresses to access to the SCC registers:
These addresses are 9800h~98FFh, and are mirrored up to 9FFFh.

Address(es) Desciption
9800h~981Fh: 32 bytes signed (value from -128 (80h) to 127 (7Fh)) to define the envelope (waveform) of the channel 1
9820h~983Fh: 32 bytes signed to define the envelope of the channel 2
9840h~985Fh: 32 bytes signed to define the envelope of the channel 3
9860h~987Fh: 32 bytes signed to define the envelope of the channels 4 and 5
9880h~9881h*: Channel 1 frequency on 12bit \
9882h~9883h*: Channel 2 frequency on 12bit |
9884h~9885h*: Channel 3 frequency on 12bit > Same format as for the PSG frequency (registers 0~5)
9886h~9887h*: Channel 4 frequency on 12bit |
9888h~9889h*: Channel 5 frequency on 12bit /
988Ah*: Channel 1 volume (bits 4~7 are ignored)
988Bh*: Channel 2 volume (bits 4~7 are ignored)
988Ch*: Channel 3 volume (bits 4~7 are ignored)
988Dh*: Channel 4 volume (bits 4~7 are ignored)
988Eh*: Channel 5 volume (bits 4~7 are ignored)
988Fh*: ON/OFF switch for each channel from 1 to 5 (bits 0~4 = Channels 1~5)
9890h~989Fh*: Same as 9880h to 988Fh (mirrors)
98A0h~98DFh*: Channel 5 envelope data (Read only)
98E0h~98FFh*: Deformation register. (One byte only, the others are mirrors. Not used by Konami.)
  • Bit 0 = Set the frequency divider on 4 bits. Division ratio becomes 1/256 of the division ratio register.
  • Bit 0 = Set the frequency divider on 8 bits. 8-11 bits are 0.
  • Bit 2~4 = ?
  • Bit 5 = When a value is written to the division ratio register, the corresponding waveform data is replayed from the beginning.
  • Bit 6 = Envelope data of all channels is rotated. As for the direction, the data that was at +0 moves to +1. The rotation time is 3.58 MHz ÷ (division ratio register value + 1). The envelope data memory is write-protected for all channels.
  • Bit 7 = Only the envelope data of channel 4 is rotated. Only channels 4 and 5 of the envelope data are write-protected. This bit is valid only in Megarom.

(*) Writting only
Note: You can't write in the registers in RAM mode because registers can only be read in this mode.

Also see the Wiki page about the SCC.

Konami's Sound Cartridge for Snatcher or SD Snatcher

This Sound Cartridge is a Mega-RAM of 64kB (expandable to 128kB) with a SCC+ (aka 052539 chip) compatible with the SCC. The sound cartridge for Snatcher have the segments 0~7 and the one for SD Snatcher have the segments 8~15.

Page (8kB) Switching address Initial segment
4000h~5FFFh (mirror: C000h~DFFFh) 5000h (mirrors: 5001h~57FFh) 0 (Snatcher only)
6000h~7FFFh (mirror: E000h~FFFFh) 7000h (mirrors: 7001h~77FFh) 1 (Snatcher only)
8000h~9FFFh (mirror: 0000h~1FFFh) 9000h (mirrors: 9001h~97FFh) 2 (Snatcher only)
A000h~BFFFh (mirror: 2000h~3FFFh) B000h (mirrors: B001h~B7FFh) 3 (Snatcher only)


Value format:

Bit 0~5 = Set all of these bits at 9000h in SCC mode or B000h in SCC+ mode to enable the addresses to access to the sound chip registers.
Bit 6~7 = Unused

Addresses to access to the SCC+ registers:
These addresses are B800h~B8FFh, and are mirrored up to BFFFh.

Address(es) Description
B800h~B81Fh: 32 bytes signed (value from -128 (80h) to 127 (7Fh)) to define the envelope form of the channel 1
B820h~B83Fh: 32 bytes signed to define the envelope form of the channel 2
B840h~B85Fh: 32 bytes signed to define the envelope form of the channel 3
B860h~B87Fh: 32 bytes signed to define the envelope form of the channel 4
B880h~B89Fh: 32 bytes signed to define the envelope form of the channel 5
B8A0h~B8A1h*: Channel 1 frequency on 12bit \
B8A2h~B8A3h*: Channel 2 frequency on 12bit |
B8A4h~B8A5h*: Channel 2 frequency on 12bit > Frequency = CPU frequency / (32 x (tempo + 1))
B8A6h~B8A7h*: Channel 4 frequency on 12bit |
B8A8h~B8A9h*: Channel 5 frequency on 12bit /
B8AAh*: Channel 1 volume (bits 4~7 are ignored)
B8ABh*: Channel 2 volume (bits 4~7 are ignored)
B8ACh*: Channel 3 volume (bits 4~7 are ignored)
B8ADh*: Channel 4 volume (bits 4~7 are ignored)
B8AEh*: Channel 5 volume (bits 4~7 are ignored)
B8AFh*: On/Off switch for channels 1 to 5 (bits 0~4 = channels 1~5)
B8B0h~B8BFh*: Same as B8A0h to B8AFh
B8C0h~B8DFh*: Deformation register. (One byte only, the others are mirrors. Not used by Konami.)
  • Bit 0 = Set the frequency divider on 4 bits. Division ratio becomes 1/256 of the division ratio register.
  • Bit 0 = Set the frequency divider on 8 bits. 8-11 bits are 0.
  • Bit 2~4 = ?
  • Bit 5 = When a value is written to the division ratio register, the corresponding waveform data is replayed from the beginning.
  • Bit 6 = Envelope data of all channels is rotated. As for the direction, the data that was at +0 moves to +1. The rotation time is 3.58 MHz ÷ (division ratio register value + 1). The envelope data memory is write-protected for all channels.
  • Bit 7 = Only the envelope data of channel 4 is rotated. Only channels 4 and 5 of the envelope data are write-protected. This bit is valid only in Megarom.
B8E0h~B8FFh: Not used

Modes select register:
This register is used to select the SCC or SCC+ mode as well as the RAM or ROM mode of the pages. Always accessible at the addresses below.

BFFEh/BFFFh*:

  • Bit 0 = 1 for page 4000h~5FFFh in RAM mode, 0 for ROM mode (no effect if bit 4 is set)
  • Bit 1 = 1 for page 6000h~7FFFh in RAM mode, 0 for ROM mode (no effect if bit 4 is set)
  • Bit 2 = 1 for page 8000h~9FFFh in RAM mode, 0 for ROM mode (no effect if bit 4 is set)
  • Bit 3 = Not used
  • Bit 4 = 1 to put all the pages in RAM mode, 0 to put the page A000h~BFFFh in ROM mode and others in mode determined by the bits 0~2.
  • Bit 5 = 1 for SCC+ mode, 0 for SCC mode
  • Bits 6~7 = Not used

(*) Writing only

Note: You can't write in the registers in RAM mode because registers can only be read in this mode.

See too the Wiki pages for the SCC+ and the Sound Cartridge.

Konami's MegaROMs without SCC

Page (8kB) Switching address Initial segment
4000h~5FFFh (mirror: C000h~DFFFh) None Always 0
6000h~7FFFh (mirror: E000h~FFFFh) 6000h (mirrors: 6001h~7FFFh) 1
8000h~9FFFh (mirror: 0000h~1FFFh) 8000h (mirrors: 8001h~9FFFh) Random
A000h~BFFFh (mirror: 2000h~3FFFh) A000h (mirrors: A001h~BFFFh) Random
Note: Hai no Majutsushi (RC-765) has an extra 8bit digital to analog converter. Each value to be sent (0 for -128 ~ FFh for +128) must be written at a corresponding address (5000h~5FFFh).

MegaRam DDX (Digital Design)

This is a MegaRam from Brazil, created by Ademir Carchano and cloned by several manufacturers, including DDX, and MSX users. Memory size varies from 256kB to 2048kB depending on the model (II-MEGARAM, MegaRam 2 mega, etc). DDX created the MegaRAM Disk, that has a disk Rom and allows the RAM to be used as a RAM disk.

Page (8kB) Switching address Initial segment
4000h~5FFFh 4000h 0
6000h~7FFFh 6000h 1
8000h~9FFFh 8000h 2
A000h~BFFFh A000h 3

A writing to I/O port 8Eh enables the Megaram. Ram is write protected, you can select segments. A reading of same port will allow writing to RAM.

MSX-DOS 2 (ASCII)

Page (16kB) Switching address Initial segment
4000h~7FFFh 6000h or 7FFEh (v.2.20), or 7FF0h (v.2.3x of MSX Turbo R) 0

Note: Switching addresse 6000h and 7FFEh depends on cartridge.

PAC (Panasoft)

8kB SRAM cartridge. Same device is included in FM-PAC cartridge.

Page (8kB) Switching address Initial segment
4000h~5FFFh 5FFEh & 5FFFh None
Note: Write 4Dh to 5FFEh and 69h to 5FFFh to select the SRAM. Write 0 to 5FFEh and 5FFFh disable the SRAM.

Super Altered Beast (Clover Soft) / 슈퍼 수왕기 (크로바소프트)

Rom size is only 64kB.

Page (16kB) Switching address Initial segment
4000h~7FFFh None Always 0
8000h~BFFFh 8000h ?

Value format
Bit 0 = Unused
Bit 1 ~ 3 = Segment number
Bit 4 ~ 7 = Unused

Super Game World 30/64/80 (Screen Software)

This mapper is used for some MegaRoms containing several hacked games. It's same mapper as Golden Box in mode 8k.

Page (8kB) Switching address Initial segment
4000h~5FFFh 4000h 0
6000h~7FFFh 4001h 0
8000h~9FFFh 4002h 0
A000h~BFFFh 4003h 0

Super Game 90 (Unknown Publisher)

MegaRom released in Korea. Rom size is 1024kB. It contains several hacked games. Switching segment must be specified to I/O port 77h,Switching address is not used.

Page (8kB or 16kB) Switching I/O port Initial segment
4000h~7FFFh 77h 0
8000h~BFFFh 77h 0


Value format
Bit 0 ~ 5 = 16KB segment number
Bit 6 = If set, the first 8kB of specified segment will be swapped with second part of 8K on page 8000h~BFFFh. This bit is ignored when the bit 7 is set.
Bit 7 = If reseted, the specified segment will be mirrored on page 8000h~BFFFh otherwise it's the next segment.

Super Game World 126 (Screen Software)

This mapper is used for a MegaRoms of 2048kB that containing several hacked games. It's same mapper as Golden Box in mode 16k.

Page (16kB) Switching address Initial segment
4000h~7FFFh 4000h 0
8000h~BFFFh 4001h 0

Super Lode Runner (Irem)

Rom size is 128kB.

Page (16kB) Switching address Initial segment
8000h~BFFFh 0000h (mirrors: 0001h~3FFFh) (no need to select the slot!) 0

Note: Switching address mirrors cause issue on a real MSX Turbo R.

Super Pierrot (Taito - Nidecom)

Rom size is 128kB.

Page (16kB) Switching address Initial segment
4000h~7FFFh 4000h (mirrors: 4001h~4FFFh, 6000h~6FFFh, 8000h~8FFFh, A000h~AFFFh) 0
8000h~BFFFh 5000h (mirrors: 5001h~5FFFh, 7000h~7FFFh, 9000h~9FFFh, B000h~BFFFh) 0

Zemina 8k

Used for several MegaRoms released in Korea by Zemina. This mapper is similar to Konami's MegaROMs without SCC.

Page (8kB) Switching address Initial segment
4000h~5FFFh (mirror: C000h~DFFFh) 4000h (mirrors: 4001h~5FFFh) 0
6000h~7FFFh (mirror: E000h~FFFFh) 6000h (mirrors: 6001h~7FFFh) 1
8000h~9FFFh (mirror: 0000h~1FFFh) 8000h (mirrors: 8001h~9FFFh) 2
A000h~BFFFh (mirror: 2000h~3FFFh) A000h (mirrors: A001h~BFFFh) 3

Zemina 16k

Used for some MegaRoms released in Korea by Zemina.

Page (16kB) Switching address Initial segment
4000h~7FFFh (mirror: C000h~FFFFh) 4000h (mirrors: 4001h~7FFFh) 0
8000h~BFFFh (mirror: 0000h~7FFFh) 8000h (mirrors: 8001h~BFFFh) 1

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