the official docs do not say that r2 is a page selection register effectively it does pratically state the opposite. the sentence "To select ...... use r#2" and "These two bits specify ...... " say exactly what i mean:
they say/explain that YOU CAN USE those bits as page selector and point also how you need to setup other less significant bits to achieve the result,(in other words, you can see address bits as a page selector, but the concept is not in the VDP at hw level, it is our interpretation).
And this is clearly visible by the fact that you need to set up bits 0-4 to 1.
If it was a real page concept those bits never were on this register.
(And please do not say that those bits are here to keep costs down because for vdp engineers it was surely more cost saving to not have to store the first five bits and simply hardwire them to 1 than having to give the user the user the ability to modify them.)
The less significant bits are here, and are modifiable because it is needed, in other modes, to have more granularity in base address specification and because R#2 is an address register not a page selector. the fact that you use those two higher bits as a page selector is obviously a way to think the display as made up of pages.
but it is not a concept built in v9938 as it is the concept of X-Y coordinates in logical commands.
(And effectively i can say the VDP has a page concept made up of 16K Pages simply by taking into consideration the most three higher bits of R#2 but obviously it is only an interpretation, the vdp does not see vram as 16K blocks)
you can have your interpretation of R#2. But the Fact are clearly under our eyes no matter of your interpretation: the figure you posted above say clearly that R#2 is a base register, acts as a base address register. If the vdp designers wanted to create a page selector register those less significant bit were not here.
Simply the fact that docs require you to setup bits 0-4 to 1 to achieve a page concept prove my point.
And as you said: Fact are Facts.
Aoineko, you act like the believers who describe the bible or the quran word for word. Here it's just that the author of this doc used the term page to simplify the explanation of how it works. MSX1 has no page concept. R#2 exists since MSX1. The concept did not change thereafter. It contains an address part (because the registers are only 8 bits long). It's the same for most other registers.
(And effectively i can say the VDP has a page concept made up of 16K Pages simply by taking into consideration the most three higher bits of R#2 but obviously it is only an interpretation, the vdp does not see vram as 16K blocks)
Your misinterpretation may come from there: the notion of page is indeed 16 KB for the G4 and G5 modes, but 32 KB for the G6 and G7 modes.
This is precisely the subtlety of this concept, the reason why it is clearly explained in the V9938 documentation and why it is important for programmers to know it.
That said, whether the electronic wiring justifies this concept or not, I have never opened a VDP to judge and as a programmer, I really don't care.
The pages are the way ASCII and Yamaha engineers named the particularities of using the R#2 register in the Bitmap modes and I see no point to deny this "concept".
Aoineko, you act like the believers who describe the bible or the quran word for word. Here it's just that the author of this doc used the term page to simplify the explanation of how it works. MSX1 has no page concept. R#2 exists since MSX1. The concept did not change thereafter. It contains an address part (because the registers are only 8 bits long). It's the same for most other registers.
Glad to see someone that see things as they are.
(And effectively i can say the VDP has a page concept made up of 16K Pages simply by taking into consideration the most three higher bits of R#2 but obviously it is only an interpretation, the vdp does not see vram as 16K blocks)
Your misinterpretation may come from there: the notion of page is indeed 16 KB for the G4 and G5 modes, but 32 KB for the G6 and G7 modes.
(At least it is 32 and 64K not 16 and 32 as you said in bitmap modes ;-) )
I've not interpreted in a wrong way,there is no misinterpretation. the assumption of 16Kb pages is nowhere said. It's my interpretation. I've could have said: "looking at 4 more significant bits, you can set the 8Kb Page for the vdp and so one...". And this statement is absolutely true. However i've never heard anyone saying that the vdp work with 8Kb pages!
The reality is you just are playing with a number of most significant bits in a register, the more bits you consider the smaller is the "page concept" you pretend there is. But there is no page concept in the vdp on R#2. You, or whatever is, see this concept by doing a useful interpretation based on your needs.
I will make you another example. Giving a 64000 bytes of memory block i can see this a 32000 16 bit words or 64000 bytes. That is the same amount of memory! As is for the R#2 register the block size is 64000 bytes, STOP. Your interpretation makes the concept.
This is precisely the subtlety of this concept, the reason why it is clearly explained in the V9938 documentation and why it is important for programmers to know it.
there is no sublety here. It's only a basic conseguence of how bits in register works. A thing that every people with a very basic knowledge in electronics or information technology knows and understand.
That said, whether the electronic wiring justifies this concept or not, I have never opened a VDP to judge and as a programmer, I really don't care.
you may don't care, but even the most underrated electronic engineer could confirm what i've said about R#2 about bits.
(implementing memory bits cost transistors, fixing them to 0 or 1 value cost at least
some resistors a lot less expensive)
The pages are the way ASCII and Yamaha engineers named the particularities of using the R#2 register in the Bitmap modes and I see no point to question this "concept".
they haven't named anything: they have suggested a way (perhaps valid depending on screen mode, SO AGAIN NO ABSTRACTION) to think about most significant bits as page selector, but there is no inherent concept of page in R#2.
Your misinterpretation may come from there
You better be more humble and admit that you don't know anything about electronics before saying that. Moreover, your progrmming experience on MSX is quite recent.
I would not be so offensive. It is clearly a people that wants at any cost the last word.
However i think it is better to NOT have the last word than having the last word and looking presumptuous or stupid or ridiculus.
I have tried to explain why I think R2 does not mean a page concept. Maybe I wasn't clear enough or good enough in English or basically in explaining concepts. But for sure one thing is clear. Trying to explain (argue) something to these kind of people is just a waste of time regardless of which people is explaining.
I feel sorry for the OP whose thread you are derailing with 6 pages of pointless argueing about semantics. After this experience, if it were me I would hesitate to post again.
@Grauw: there is no need to feel sorry. It is not your fault!!!! to me feel free to post your reactions and your always valuable contribute!!!
Aoineko, you act like the believers who describe the bible or the quran word for word. Here it's just that the author of this doc used the term page to simplify the explanation of how it works. MSX1 has no page concept. R#2 exists since MSX1. The concept did not change thereafter. It contains an address part (because the registers are only 8 bits long). It's the same for most other registers.
The meaning of R#2 changed completely for the new graphics modes. This is how it should be explained if you fixate on this idea of R#2 stubbornly representing a single thing (namely the pattern name table, which it inherited from TMS9918):
R#2 is the name table base address. But in new modes G4 to G7:
- in G4, the name table doesn't use byte-to-tile mapping, but one byte to two points mapping.
- in G5, the name table doesn't use byte-to-tile mapping, but one byte to four points mapping.
- in G7, the name table doesn't use byte-to-tile mapping, but one byte to one point mapping.
- colours are not separated in a different table, they are there in the name table too.
- patterns are not separated in a different table, they are there in the name table too.
- It also defines the beginning of a visible page. The page has a resolution of 256x256 (G4, G7) or 512x256 (G5, G6), which is used along with the vertical scroll register to expose it completely.
- You can no longer use flexible base addresses to put the name table anywhere you want with a 1K granularity, they are fixed in equally spaced memory er... pages.
- The visible page matches 1-to-1 the memory page defined above.
This would be unnecessarily confusing and stupid. Why should you go out of your way just to avoid calling it what it is. I don't buy that pages are just abstraction any more since "name table register" (R#2) doesn't tell the right picture.