I looking for documentation about Command/Mode register of MSX-MIDI (I/O port E1h or E9h). I can not find the description of the bits when Mode register. This is always described no more than that:
https://www.msx.org/wiki/Slots
the sltwrk section is broken
the addresses dont work because the pages are missing
and the article sounds like the format of the contents of sltwrk is defined by call memini but that is not so. the contents are "whatever the cartridge likes".
the thing with 2 bytes per page is that multiple 16k ROMs could be put in one slot. subrom next to music rom or something.
but when you make the usual cartridge then you own all 4 pages, can use 8 bytes.
I don't want to mess definitions but ... I'm used to term 'page'
1) each of 4 adress pages: 0 - 00000h-03fffh, 1 - 04000h-07fffh, etc. of MSX addressing space
2) each page of flashROM of 8kB or 16kB mapped to a bank of a banked megaROM (banks 1-4 for Asc8 and banks 1-2 for Asc16)
3) each page of 256 bytes of a NAND flash memory, used in megaROMs
I don't want to mess definitions but ... I'm used to term 'page'
1) each of 4 adress pages: 0 - 00000h-03fffh, 1 - 04000h-07fffh, etc. of MSX addressing space
That one’s fine.
Giangiacomo Zaffini 2 wrote:
2) each page of flashROM of 8kB or 16kB mapped to a bank of a banked megaROM (banks 1-4 for Asc8 and banks 1-2 for Asc16)
Here your use of the term page is inconsistent with how you used it before; now you’re using it to refer to the offset into the mapped (physical) memory, rather than an area of the MSX (logical) addressing space, for which you now use the term “bank”. It should be the other way around, bank refers to the physical memory block.
“the external bank-selecting latch (or register)”
“no matter which bank is currently active”
“the processor hardware cannot automatically detect that data not currently mapped into the active bank is required. The application program must keep track of which memory bank holds a required piece of data, and then call the bank-switching routine to make that bank active.”
“The 64 KB is divided into four 16 KB "pages" which can each be independently switched.”
So the page is the CPU memory area, the bank is what is selected (activated) in this memory area.
Giangiacomo Zaffini 2 wrote:
3) each page of 256 bytes of a NAND flash memory, used in megaROMs
Flash memories indeed also use the term page, for the blocks which can be erased independently. However this is not in the context of bank switching and the CPU memory space. There’s no MMU function in flash memories.
@Grauw:
in 2) I mean that what is mapped in each bank (bank is MSX addressable memory range, e.g. bank 1 of Asc8 megaROM is 04000h-05fffh ) is a flash memory page ( e.g. page 5 Is 0a000h-0bfffh range of flash memory ).
So Asc8 megaROM bank 1 and bank 2 are in MSX page 1 and bank 3 and bank 4 are in MSX page 2. No matter which flash page is mapped in each bank.
Yes You explained right, and wiki stands with You, again I find It less clear and I got confused by it.
