T-cycles

By norakomi

Paladin (992)

norakomi's picture

10-09-2005, 00:23

I saw an article saying that all T-cycles which are in the original msx-documentation should be increased by 1.....

so when an
AND A
instruction uses 4 cycles, it actually uses 5 ?????

Login or register to post comments

By [D-Tail]

Ascended (8232)

[D-Tail]'s picture

10-09-2005, 00:34

Damn right you are. Except for turboR, that is. The turboR only has waitstates when accessing an external slot, internal ROM or internal DRAM. Smile

By marison

Expert (104)

marison's picture

10-09-2005, 00:45

There are instructions that add 2 cycles.

In http://map.tni.nl/resources/z80instr.php you should see almost everything that you need about timing.

By msd

Paragon (1372)

msd's picture

10-09-2005, 00:46

I wonder how we can disable this waitstate in the msx... and will it still work without Smile

By [D-Tail]

Ascended (8232)

[D-Tail]'s picture

10-09-2005, 00:59

I'd like to have the waitstate for external slots @ turboR removed... My memory mapper is damn slow this way Sad

By Edwin

Paragon (1182)

Edwin's picture

10-09-2005, 11:22

Turbo R has the same waitstates in z80 mode. In R800 mode there are also added waitstates for memory refresh, but not as many and the amount depends on the amount of memory. A 512k tR is therefore a bit slower than a 256k version. Fun thing is, that the 1MB has actually the same speed as a 256k tR. Probably because the extension implements much of the mapper logic itself.